Implement a module that takes 2 8-bit unsigned inputs (a, b) and one
2-bit unsigned input (op). Your module should have one 16-bit unsigned
output (z). The module computes z as follows:

  z = a + b     (if op == "00")
  z = a - b     (if op == "01")
  z = a * b     (if op == "10")
  z = "0 ...0"  (if op == "11")

Implement a testbench for your module as well. The testbench should
perform all four operations in sequence. The values of inputs a and b
should be held constant throughout simulation. The value of input a
should be assigned to 8'b00001000 and the value of b should be
assigned to 8'b00000010.

The module should be called "calc" and the file should be called
calc.v. The testbench should be called calc_tb and the file should be
calc_tb.v. A third file, called output_calc.v should contain the
output of the simulation.

Send your work, before due date, via email to the TA (csorient AT
uci.edu) and the Reader (leep AT uci.edu) in a single zip file with
your student # as its name.