xxxxxx CS 153 xxxxxx Logic Design Laboratory

xxx
Instructor:	Ian G. Harris
xxx
Goals:	Students will learn hardware design and simulation using the Verilog hardware description language. The use of hardware simulators and debugging tools will be explored.
xxx
Assignments:	There will be several (~7) lab assignments during the course.
xxx
Time/Place:	TTh 12:30-1:50, PCB 1200
xxx
Readings:	There is no required text but several reference texts on Verilog will be available on reserve at the library. In addition, the following links point to freely available Verilog introductory information on the web: Verilog Tutorial Verilog Manual
TA:	Claudio Soriente .
TA Office Hours:	Tuesday, 10:30-12:30 in CS 458B .
Prerequisites:	Knowledge of hardware design (CS 151 equivalent).
Links:	Lecture slides Setup instrctions for the VCS simulator
Problem Sets:	Problem Set 1, due Thursday April 12 Problem Set 2, due Friday April 20 Problem Set 3, due Tuesday May 1 Problem Set 4, due Tuesday May 8 Problem Set 5, due Tuesday May 22 Problem Set 6, due Thursday June 7
xxx