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The
EXPRESSION project aims to achieve exploration of Systems-On-Chip (SOCs) with
programmable processor cores and novel memory hierarchies. Effective exploration
of such SOCs is possible by considering the interaction between the processor
architecture, the compiler and the target application. In this project we use
EXPRESSION, an Architecture Description Language (ADL), to specify the
processor-memory architecture. Further, we automatically generate EXPRESS,
a highly optimizing, Instruction-Level-Parallelizing (ILP) compiler, and
SIMPRESS, a cycle-accurate, structural simulator from EXPRESSION.
EXPRESSION, EXPRESS and SIMPRESS are integrated under a visual environment,
V-SAT (Visual Specification and Analysis Tool),
to aid rapid Design Space Exploration (DSE).
EXPRESSION was designed
with the dual goal of allowing processor description for fast DSE and for
automatic generation of detailed/accurate simulation/compilation tools. The
novel features of EXPRESSION include:
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Integration of the
Instruction-Set and Structure to avoid redundancy in specification,
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Automatic generation of resource
constraints (as reservation tables), and
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Constructs for explicitly
specifying novel and traditional memories
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EXPRESS was developed
with the goal of providing a retargetable compiler platform for
Embedded-System/System-on-Chip development. The EXPRESS retargetable
compiler takes in C programs and produces a highly optimized (and parallel)
target specific code using state-of-art Instruction-Level Parallelism (ILP)
techniques. The compiler features an extensive set of integrated transformations
to perform the traditional compiler tasks of code selection, instruction
scheduling and register allocation and memory-aware optimizations.
SIMPRESS is a retargetable, cycle-accurate, structural simulator that can
be used to evaluate the architecture, the application and the effectiveness of
the compiler transformations. It features an extensive set of statistic
collector agents that are used to gather information such as resource usage,
hazard count, inner-loop execution time, etc.
V-SAT provides a visual environment to graphically specify the
architecture and perform Architectural DSE in an intuitive manner. The
EXPRESSION description of the processor can be automatically generated from
the V-SAT specification.
EXPRESSION is an ADL supporting architectural design space exploration (DSE)
for embedded Systems-on-Chip (SOC) and automatic generation of a retargetable
compiler/simulator toolkit.
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