Axiomatic Specifications:VDM Clock

INIT()

ext wr time: N, bell: {quiet, ringing}, alarm: {disabled, enabled}

pre true

post (time? = midnight) ???(bell? = quiet) ? (alarm?= disabled)

TICK()

ext wr time: N, bell: {quiet, ringing}

rd alarm_time: N, alarm: {disabled, enabled}

pre true

post (time? = succ(time)) ? (if (alarm_time? = time?) ? (alarm? = enabled) then (bell? = ringing) else (bell? = bell)

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