Amir M. Rahmani
Professor University of California, Irvine
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The Dark Side of Silicon
Energy Efficient Computing in the Dark Silicon Era
Editors:
Amir M. Rahmani
Pasi Liljeberg
Ahmed Hemani
Axel Jantsch
Hannu Tenhunen
Contents: (
PDF
)
Part I: Architecture and Implementation Perspective
Chapter 1. A Perspective on Dark Silicon (
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Authors:
Anil Kanduri, University of Turku, Finland
Amir M. Rahmani, University of Turku, Finland
Pasi Liljeberg, University of Turku, Finland
Ahmed Hemani, KTH Royal Institute of Technology, Sweden
Axel Jantsch, TU Wien, Austria
Hannu Tenhunen, KTH Royal Institute of Technology, Sweden
Chapter 2. Dark vs. Dim Silicon and Near-Threshold Computing
Authors:
Liang Wang, University of Virginia, USA
Kevin Skadron, University of Virginia, USA
Chapter 3. The SiLago Solution: Architecture and Design Methods for a Heterogeneous Dark Silicon Aware Coarse Grain Reconfigurable Fabric
Authors:
Ahmed Hemani, KTH Royal Institute of Technology, Sweden
Nasim Farahini, KTH Royal Institute of Technology, Sweden
Syed M. A. H. Jafri, KTH Royal Institute of Technology, Sweden
Hassan Sohofi, KTH Royal Institute of Technology, Sweden
Shuo Li, KTH Royal Institute of Technology, Sweden
Kolin Paul, Indian Institute of Technology (IIT), India
Chapter 4. Heterogeneous Dark Silicon Chip Multi-Processors: Design and Run-Time Management
Authors:
Siddharth Garg, New York University, USA
Yatish Turakhia, Stanford University, USA
Diana Marculescu, Carnegie Mellon University, USA
Part II. Run-Time Resource Management: Computational Perspective
Chapter 5. Thermal Safe Power: Efficient Thermal-Aware Power Budgeting for Manycore Systems in Dark Silicon
Authors:
Santiago Pagani, Karlsruhe Institute of Technology (KIT), Germany
Heba Khdr, Karlsruhe Institute of Technology (KIT), Germany
Jian-Jia Chen, TU Dortmund, Germany
Muhammad Shafique, Karlsruhe Institute of Technology (KIT), Germany
Minming Li, City University of Hong Kong (CityU), Hong Kong, China
Jörg Henkel, Karlsruhe Institute of Technology (KIT), Germany
Chapter 6. Power Management of Asymmetric Multi-Cores in the Dark Silicon Era
Authors:
Anil Kanduri, University of Turku, Turku, Finland
Amir M. Rahmani, University of Turku, Turku, Finland
Pasi Liljeberg, University of Turku, Turku, Finland
Ahmed Hemani, KTH Royal Institute of Technology, Stockholm, Sweden
Axel Jantsch, TU Wien, Vienna, Austria
Hannu Tenhunen, UnKTH Royal Institute of Technology, Stockholm, Sweden
Chapter 7. Multi-Objective Power Management for CMPs in the Dark Silicon Age
Authors:
Anil Kanduri, University of Turku, Turku, Finland
Amir M. Rahmani, University of Turku, Turku, Finland
Pasi Liljeberg, University of Turku, Turku, Finland
Ahmed Hemani, KTH Royal Institute of Technology, Stockholm, Sweden
Axel Jantsch, TU Wien, Vienna, Austria
Hannu Tenhunen, KTH Royal Institute of Technology, Stockholm, Sweden
Chapter 8. Robust Application Scheduling with Adaptive Parallelism in Dark-Silicon Constrained Multicore Systems
Authors:
Nishit Kapadia, Colorado State University, USA
Sudeep Pasricha, Colorado State University, USA
Chapter 9. Dark Silicon Patterning: Efficient Power Utilization Through Run-Time Mapping
Authors:
Anil Kanduri, University of Turku, Turku, Finland
Mohammad-Hashem Haghbayan, University of Turku, Turku, Finland
Amir M. Rahmani, University of Turku, Turku, Finland
Pasi Liljeberg, University of Turku, Turku, Finland
Axel Jantsch, TU Wien, Vienna, Austria
Hannu Tenhunen, KTH Royal Institute of Technology, Stockholm, Sweden
Chapter 10. Online Software-Based Self-Testing in the Dark Silicon Era
Authors:
Mohammad-Hashem Haghbayan, University of Turku, Turku, Finland
Amir M. Rahmani, University of Turku, Turku, Finland
Antonio Miele, Politecnico di Milano, Italy
Pasi Liljeberg, University of Turku, Turku, Finland
Hannu Tenhunen, KTH Royal Institute of Technology, Stockholm, Sweden
Part III: Design and Management: Communication Perspective
Chapter 11. Adroit Use of Dark Silicon for Power, Performance and Reliability Optimisation of NoCs
Authors:
Haseeb Bokhari, UNSW, Australia
Muhammad Shafique, KIT, Karlsruhe, Germany
Jörg Henkel, KIT, Karlsruhe, Germany
Sri Parameswaran, UNSW, Australia
Chapter 12. NoC-Aware Computational Sprinting
Authors:
Jia Zhan, University of California, Santa Barbara, USA
Yuan Xie, University of California, Santa Barbara, USA