BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//UC Irvine Donald Bren School of Information & Computer Sciences - ECPv6.3.4//NONSGML v1.0//EN
CALSCALE:GREGORIAN
METHOD:PUBLISH
X-WR-CALNAME:UC Irvine Donald Bren School of Information & Computer Sciences
X-ORIGINAL-URL:https://ics.uci.edu
X-WR-CALDESC:Events for UC Irvine Donald Bren School of Information & Computer Sciences
REFRESH-INTERVAL;VALUE=DURATION:PT1H
X-Robots-Tag:noindex
X-PUBLISHED-TTL:PT1H
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20250309T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20251102T090000
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20250307T110000
DTEND;TZID=America/Los_Angeles:20250307T120000
DTSTAMP:20261012T061445
CREATED:20250224T222430Z
LAST-MODIFIED:20250224T222515Z
UID:24394-1741345200-1741348800@ics.uci.edu
SUMMARY:Memory-Centric Computing: Enabling Fundamentally Efficient Computers
DESCRIPTION:Abstract: Computing is bottlenecked by data. Large amounts of application data overwhelm storage capability\, communication capability\, and computation capability of the modern machines we design today. As a result\, many key applications’ performance\, efficiency\, and scalability are bottlenecked by data movement. In this talk\, we describe three major shortcomings of modern architectures in terms of 1) dealing with data\, 2) taking advantage of the vast amounts of data\, and 3) exploiting different semantic properties of application data. We argue that an intelligent architecture should be designed to handle data well. We posit that handling data well requires designing architectures based on three key principles: 1) data-centric\, 2) data-driven\, 3) data-aware. We give examples for how to exploit these principles to design a much more efficient and higher performance computing system. We especially discuss recent research that aims to fundamentally reduce memory latency and energy\, and practically enable computation close to data\, with at least two promising directions: 1) processing using memory\, which exploits the fundamental operational properties of memory chips to perform massively-parallel computation in memory\, with low-cost changes\, 2) processing near memory\, which integrates sophisticated additional processing capability in memory chips\, the logic layer of 3D-stacked technologies\, or memory controllers to enable near-memory computation with high memory bandwidth and low memory latency. We show both types of architectures can enable order(s) of magnitude improvements in performance and energy consumption of many important workloads\, such as machine learning\, graph analytics\, database systems\, video processing\, climate modeling\, genome analysis. We discuss how to enable adoption of such fundamentally more intelligent architectures\, which we believe are key to efficiency\, performance\, and sustainability. We conclude with some research opportunities in and guiding principles for future computing architecture and system designs. \nAn accompanying overview of modern memory-centric computing ideas & systems can be found at https://arxiv.org/abs/2012.03112 (“A Modern Primer on Processing in Memory”\, updated January 2025). \nBio: Onur Mutlu is a Professor of Computer Science at ETH Zurich. He previously held the William D. and Nancy W. Strecker Early Career Professorship at Carnegie Mellon University. His current research interests are in computer architecture\, computing systems\, hardware security\, memory & storage systems\, and bioinformatics\, with a major focus on designing fundamentally energy-efficient\, high-performance\, and robust computing systems. He obtained his PhD and MS in ECE from the University of Texas at Austin and BS degrees in Computer Engineering and Psychology from the University of Michigan\, Ann Arbor. He started the Computer Architecture Group at Microsoft Research (2006-2009)\, and held product\, research and visiting positions at Intel Corporation\, Advanced Micro Devices\, VMware\, Google\, and Stanford University. He received various honors for his research\, including the 2025 IEEE Computer Society Harry H. Goode Memorial Award\, 2024 IFIP WG10.4 Jean-Claude Laprie Award in Dependable Computing (for the original RowHammer work)\, 2022 Persistent Impact Prize of the Non-Volatile Memory Systems Workshop (for original architectural work on Phase Change Memory)\, 2021 IEEE High Performance Computer Architecture Conference Test of Time Award (for the Runahead Execution work)\, 2020 IEEE Computer Society Edward J. McCluskey Technical Achievement Award\, 2019 ACM SIGARCH Maurice Wilkes Award and tens of best paper or “Top Pick” paper recognitions at various leading computer systems\, architecture\, and security venues. He is an ACM Fellow\, IEEE Fellow\, and an elected member of the Academy of Europe. He enjoys teaching\, mentoring\, and enabling & democratizing access to high-quality research and education. He has supervised 23 PhD graduates\, multiple of whom received major dissertation awards\, 15 postdoctoral trainees\, and more than 60 Master’s and Bachelor’s students. His computer architecture and digital logic design course lectures and materials are freely available on YouTube (https://www.youtube.com/OnurMutluLectures & https://www.youtube.com/@CMUCompArch)\, and his research group (https://safari.ethz.ch/) makes a wide variety of software and hardware artifacts freely available online (https://github.com/CMU-SAFARI). For more information\, please see his webpage at https://people.inf.ethz.ch/omutlu/. \nWebsite: http://people.inf.ethz.ch/omutlu/
URL:https://ics.uci.edu/event/memory-centric-computing-enabling-fundamentally-efficient-computers/
LOCATION:Donald Bren Hall\, Irvine\, CA\, 92697\, United States
ATTACH;FMTTYPE=image/jpeg:https://ics.uci.edu/wp-content/uploads/2025/02/Onur-Mutlu-resize.jpg
END:VEVENT
END:VCALENDAR